The present invention relates to complementary metal oxide semiconductor (CMOS) device manufacturing, and more particularly to a method and integration scheme to use chemical oxide removal (COR) to preserve an oxide hard mask for the purpose of avoiding silicon growth on the gate stack during raised source/drain formation. Silicon growth on the gate stack must be prevented in order to avoid interference with spacer removal and extension implants. The presence of the oxide hard mask also significantly enhances yield.
Prior art raised source/drain (RSD) processing includes a disposable spacer and a gate cap flow. In such prior art processing, a SiN layer is used as a hard mask to etch the gate stack, which is located atop a semiconductor substrate. After etching of the gate stack, the SiN layer is left atop the gate stack. SiN spacers are next fabricated on the sidewalls of the gate stack to completely xe2x80x9cencapsulatexe2x80x9d the gate stack. Next, a pre-RSD cleaning step is performed on exposed surfaces of the semiconductor substrate abutting the gate stack, after which the RSD regions are grown. Typically, the pre-RSD cleaning step includes the use of aqueous HF based chemistries and then RSD regions are grown. The spacers and the cap are then removed by hot phosphoric acid.
One advantage of such prior art RSD processing is that bridging from the gate to the source/drain is substantially reduced or even eliminated. Another advance of the foregoing processing scheme is that it enables the RSD to be grown on an intrinsic surface. Moreover, the overall thermal budget that the extensions experience can be substantially minimized since the extensions may be implanted after the RSD.
Although the advantages of the RSD disposable spacer scheme described above are attractive, there are several disadvantages. Specifically, any corner rounding of the SiN hard mask during the gate stack etch may lead to exposed portions of the gate during RSD growth. Selective silicon will grow on any region of exposed Si, which causes unwanted protuberances that can block implants. Another drawback of the prior art RSD disposable spacer scheme is that the SiN hard mask is more difficult to controllably trim. In addition, the removal process for SiN by hot phosphoric acid is capable of pitting Si and can leave appreciable amounts of metal contamination.
In view of the drawbacks mentioned above with the prior art RSD disposable spacer scheme, there is a need for developing a new and improved processing scheme for forming RSD regions that avoids the disadvantages mentioned above.
One object of the present invention Is to provide a method of fabricating a CMOS device having RSD regions.
Another object of the present invention is to provide a method of fabricating a CMOS device having RSD regions in which silicon growth on the gate stack is avoided during formation of the RSD regions.
A yet further object of the present invention is to provide a method of fabricating a CMOS device having RSD regions in which problems with spacer removal and extension implant formation Is substantially eliminated.
A still further object of the present invention is to provide a method of fabricating a CMOS device having RSD regions in which an oxide hard mask is employed that is more easily trimmed than is a SiN hard mask.
Another object of the present invention is to provide a method of fabricating a CMOS device having RSD regions in which no substantial amount of pitting of Si occurs.
An even further object of the present invention is to provide a method of fabricating a CMOS device having RSD regions in which no substantial metal contamination is observed.
A still even further object of the present invention is to provide a method of fabricating a CMOS device in which SiO2 disposable spacers are employed.
A yet even further object of the present invention is to provide a method of fabricating a CMOS device having RSD regions In which all of the advantages of the prior art RSD integration scheme mentioned above are obtained, while overcoming all of the disadvantages thereof.
These and other objects and advantages are obtained in the present invention by utilizing an oxide hard mask as well as chemical oxide removal (COR) which preserves the oxide hard mask over the gate stack thereby avoiding Si growth on the gate stack during RSD formation. The present invention thus provides a reliable robust alternative to the prior art RSD integration scheme mentioned in the background section of the present application.
Specifically, the method of the present invention, which is employed in fabricating a CMQS device having RSD regions, comprises the steps of: providing a material stack atop a surface of a semiconductor substrate, said material stack comprising an oxide hard mask located atop a gate conductor, which is located atop a gate dielectric; patterning said oxide hard mask and said gate conductor of said material stack; forming a disposable spacer on at least each sidewall of said patterned gate conductor; removing portions of said gate dielectric not protected by said disposable spacers and said patterned gate conductor to expose portions of said semiconductor substrate, wherein said removing comprises a chemical oxide removal step; forming raised source/drain regions in exposed portions of said semiconductor substrate; and
removing said disposable spacers to expose portions of said semiconductor substrate abutting the patterned gate conductor.
In a preferred embodiment of the present invention, the disposable spacer that is formed on at least each sidewall of the patterned gate conductor is composed of SiO2 since selective epi processes, which are used in forming the RSD regions, are more selective to SiO2 than SiN.
In some embodiments of the present invention, the oxide hard mask and the gate dielectric beneath the disposable spacers are removed during the removing of the disposable spacers.
After removing the disposable spacers and optionally the oxide hard mask and the gate dielectric beneath the disposable spacers, the method of the present invention further comprises the steps of: forming source/drain extension regions in portions of the semiconductor substrate that are left exposed after said removing step; and forming source/drain regions in at least said raised source/drain regions.
In some embodiments of the present invention, the source/drain regions may be formed prior to removing the disposable spacers.